This invention relates generally to radio frequency identification (RFID) tag devices, and more particularly, to a radio frequency identification tag device which calibrates its decoder timing from a received pulse position modulation (PPM) signal within one calibration symbol time.
Radio frequency identification (RFID) tag devices may be used in managing inventory, automatic identification of cars on toll roads, security systems, electronic access cards, keyless entry and the like. RFID tag devices will work under more hostile environmental conditions than bar code labels since the RFID tag device may be read through paint, water, dirt, dust, human bodies, concrete, or through the tagged item itself. RFID tag devices are used in conjunction with a radio frequency tag reader (interrogator) which generates a continuous wave (CW) radio frequency (RF) or electromagnetic carrier that activates the RFID tag device at close range. The RFID tag device is passive and may have no internal power sources, rather it uses some of the power in the CW RF or electromagnetic carrier of the RFID tag reader to power internal circuits that read a stored internal digital code and cause the RFID tag device to signal its stored internal digital code to the RFID tag reader.
The RFID tag device modifies the amplitude of the CW carrier of the RFID tag reader by tuning and detuning a resonant circuit tuned to the CW carrier. The RFID tag device comprises, for example, a parallel resonant circuit or antenna tuned to the frequency of the CW radio frequency or electromagnetic carrier, an RF to direct current (DC) converter, a circuit for tuning and detuning the parallel resonant circuit/antenna, logic which stores the internal digital code, logic which reads the internal digital code and causes the circuit for tuning and detuning the parallel resonant circuit/antenna to operate in co-operation with the internally stored digital code.
An excellent application for RFID tag devices is item level tagging such as retail and inventory management where a large number of RFID tags may be read and written in the same reader field. Read-write memory is incorporated in the RFID tag device and may be allocated for device operation (program) and user data such as for example, but not limited to, inventory number, product expiration date, weight, product description, etc. The RFID tag device may have, for example, two operational modes: 1) xe2x80x9ctag talks firstxe2x80x9d and 2) xe2x80x9creader talks firstxe2x80x9d modes. The xe2x80x9ctag talks firstxe2x80x9d mode is when the RFID tag device transmits its data as soon as it is energized by the RFID tag reader. The xe2x80x9creader talks firstxe2x80x9d mode is when the RFID tag device does not transmit unless being commanded to do so by the RFID tag reader.
The RFID tag reader sends command signals to the RFID tag device by modulating its RF or electromagnetic carrier signal. These command signals may be represented by appropriately timed gap pulses using, for example, Pulse Position Modulation (PPM) of the RF or electromagnetic carrier signal. PPM is a digital transmission scheme whereby data is represented by the temporal location of a pulse or pulses within a time window known as a symbol frame.
It is desirable for power and space considerations of the RFID tag device to utilize an onboard oscillator for supplying the clock timing required for decoding the PPM transmission symbols. The frequency of the internal oscillator of the RFID tag device, however, may vary as much as plus or minus 25 percent because of changes in the semiconductor fabrication process, operating voltage and/or temperature. This much variation in the RFID tag device""s internal oscillator clock frequency would make accurate decoding of the PPM transmission impossible if left uncorrected.
Known methods of matching the RFID tag device internal clock oscillator frequency to the external PPM frequency involves adjusting the internal clock oscillator frequency and requires several cycles of calibration symbols to accurately lock the internal clock oscillator to the PPM frequency transmitted by the RFID tag reader. A phase locked loop has been used to adjust the internal clock oscillator frequency in this manner. U.S. Pat. Nos. 4,648,133 and 5,354,319 disclose phase locked loops for controlling the frequency of the PPM decoder clock oscillator so as to lock to the external PPM signal. U.S. Pat. No. RE. 31,254 discloses calculating an error component between a local oscillator and an external frequency source with a software program algorithm running on a microprocessor.
Therefore, what is needed is a simpler, faster and more effective way of calculating the relative frequency relationship between a PPM receiver/decoder oscillator and an externally transmitted PPM signal, and then calibrating the PPM decoder circuit to the required timing precision for correct PPM decoding within one calibration symbol time.
The invention overcomes the above-identified problems as well as other shortcomings and deficiencies of existing technologies by providing in an RFID tag device a circuit that calculates the relative frequency relationship between an internal oscillator of the RFID tag device and an external PPM source such as a RFID tag reader, and then calibrates the RFID tag device PPM decoder circuit to the required precision for reliable PPM symbol decoding. In the embodiment of the present invention, the PPM decoder is calibrated to the difference between the external PPM frequency source (i.e., RFID tag reader) and the internal clock-oscillator of the RFID tag device, which is preformed in a single measurement during one calibration symbol time.
The RFID tag reader sends the command and acknowledgement signals to the RFID tag device by modulating the continuous wave (CW) carrier signal. The RFID tag reader uses, for example, two classes of encoding signals for modulation. They are (a) 1-of-16 PPM for data transmission, and (b) fast read commands that consist of gap pulse sequences. The gap pulse sequences are controlled by pulse width and time spacing between pulses to encode the command and operating parameters. The RFID tag reader also sends time reference pulses to calibrate the time base of the decoder in the RFID tag device.
The RFID tag reader uses 1 of 16 PPM for control commands such as tag acknowledgement, read a tag block, write a tag block, etc. The 1 of 16 PPM uses the pulse positions in one of sixteen possible time slots as the communication mechanism for sending 4 bit symbols (24=16). All communications begin with a code violating calibration sequence composed of, for example but not limited to, three pulses in pulse positions zero, six and fourteen.
The symbol frame start and end are not explicitly transmitted and are recovered by knowledge of the last symbol received, the count to the next received pulse and counts per pulse width. An equation describing this relationship is:
(sym)n=CBP/CPPxe2x88x9216+(sym)nxe2x88x921
where CBP=number of internal oscillator counts between pulses
CPP=number of internal oscillator counts per pulse width
(sym)nxe2x88x921=previous received symbol
(sym)n=new symbol received
Initiating synchronization is achieved by recognizing the code violating calibration symbol and determining the xe2x80x9ccounts per pulse widthxe2x80x9d (CPP) of the internal oscillator of the RFID tag device. Maintaining synchronization requires the ability to use the new pulse to correct for any accumulated error between the RFID tag device and the transmitted PPM time bases, and to maintain the time base of the RFID tag device time base to sufficient accuracy between the PPM pulses. For a maximum pulse separation of 31 pulse positions, the maximum allowed error is preferably xc2xd pulse position. This allows a maximum error of one part in 62, or +/xe2x88x921.6%.
Timing for detecting (demodulating) these commands from the PPM radio frequency (RF) or electromagnetic transmission is generated by a clock-oscillator internal to the RFID tag device. Communication between the RFID tag reader and RFID tag device takes place asynchronously with respect to the internal oscillator of the RFID tag device. To enhance the detection accuracy in the RFID tag device, the RFID tag reader sends three specifically timed reference pulses followed by the command and programming data signals. The RFID tag device uses the calibration timing pulses to calibrate its timing reference in the PPM decoder. The RFID tag reader transmits the timing pulses at the start of the command. Time periods between the timing pulses may be used to calibrate the RFID tag device""s timing for proper PPM decoding. According to the present invention, the RFID tag device measures the time periods between the demodulated time reference pulses, and uses these time periods to calibrate its internal PPM decoder circuit and thus determine the CPP.
The PPM decoder of the RFID tag device may be implemented as a state machine. The PPM decoder state machine uses a bit window counter to track the state of the received PPM transmission. On REID tag device power up, its PPM decoder state machine expects the transmission of a code violating calibration symbol. The format of the calibration symbol generally comprises three modulation pulses at time slots zero, six and fourteen of sixteen possible time slots in a code symbol. Other number of modulation pulses and time slots for a calibration symbol may be used and are contemplated herein.
While the PPM decoder is in its initial state, the bit window counter is reset to 016 and kept there until the detection of the first modulation pulse. Once the first modulation pulse of the calibration symbol has been received, a bit down counter is loaded with a reload value, for example 516, and is allowed to count down at the rate of the internal clock. When the bit down counter underflows, the bit window counter is incremented by one and the bit down counter is reloaded with the contents of a reload register. The value stored in the reload register consists of the upper 3 bits of a calibration code register plus a 1 in the most significant bit to make a 4 bit reload word. The initial value stored in the calibration code register is 2016. At each underflow of the bit down counter, the bit window counter is incremented by one and the bit down counter is reloaded.
Upon reception of the next modulation pulse, if the bit window counter is in the range of 516 and 716, the bit window counter is set to 516 and the bit down counter is reloaded with 516 Operation of the invention proceeds as before with the bit down counter causing the bit window counter to increment on each underflow and the bit down counter being reloaded with the contents of the reload register. During this period the calibration controller will start the calibration counter based on the value stored in the calibration code register, the bit down counter and the bit window counter. The calibration counter counts in the range of 0816 to 2F16 and increments at the rate of the internal oscillator. If a third modulation pulse occurs within the bit window range of C16 to F16 then it is assumed that this is the calibration symbol. The bit window counter is reset to E16, the bit down counter is reloaded with 516, and the calibration code register is loaded with the current value of the calibration counter (from 0816 to 2F16).
PPM symbol reception begins once the bit window counter rolls over to 016. PPM uses the bit position within the symbol frame to represent data. The bit window counter is used to decode this symbol value. On every modulation pulse, the bit down counter is loaded with 516, which is approximately the midpoint of every window for all allowed values found in the calibration code register. At any time, a calibration symbol may occur as long as it is properly framed within a symbol time. A calibration controller starts the calibration counter based on the current calibration code, bit window counter and bit down counter. If the current calibration code is correct, then the reception of the 3rd bit of the calibration symbol will occur when the values in the bit window counter equals E16 and the bit down counter equals 516, respectively. Under these conditions the value in the calibration counter will always equal the value in the calibration code register. The difference between the old calibration code register value and a new value represents the accumulated error in clock cycles over 8 bits times. For example, if the difference between an old value and the new value of the calibration code register is one then the accumulated calibration error is one count in eight bit periods or xe2x85x9 of a clock per bit period.
This example represents the precision of this embodiment of the present invention. The level of precision that is required is determined by the worst case transmission which is the symbol 016 followed by the symbol F16. The spacing between a symbol 016 and a symbol F16 is 31 bit window spaces. Therefore the worst case accumulated error at the given precision would be plus or minus 3xe2x85x9ths or approximately 4 for a total window error of less than 8. For a successful transmission to occur the worst case error must be less than the number of counts in the bit window. It is not possible to produce xe2x85x9th of a count on every symbol without using an oscillator running at eight times the count frequency. Since this would be undesirable in terms of power consumption, the fractional window values are implemented as an average over the entire symbol time. This is implemented by incrementing the reload register value by one, N out of 8 times, where N is the value in the lower 3 bits of the calibration code register.
An advantage of the present invention is calibrating a PPM decoder to a difference between an internal clock-oscillator and a received PPM frequency.
Another advantage is that a single simple oscillator is used that consumes less power than a frequency matching or locking local oscillator such as a phase-locked-loop.
A feature of the present invention is that a simple low power counter is used to generate a new calibration mode.